February 2015
28
M
icrocontrollers
& S
o
C
s
SoC design enables easy and
fast migration of platform solutions
By Giles Peckham,
Xilinx
The Zynq-7000 All Programmable SoC
is suited for implementing a
platform strategy for most
embedded applications. With its
integration between ARM processing
and FPGA logic and I/O
programmability, it allows
every level of an enterprise
to harmonize their development
efforts and bring highly differentiated
product lines to market faster.
Ever since Xilinx shipped the Zynq-7000
All Programmable SoC in late 2011, a bounty
of products has been arriving. Today the
Zynq SoC is at the heart of many of the new-
est and most innovative automotive, medi-
cal and security vision products, as well as
advanced motor-control systems that make
factories safer, greener and more efficient. The
Zynq SoC has also won sockets in next-gen-
eration wired and wireless communications
infrastructure equipment as well as a wealth
of emerging Internet-of-Things applications.
Having experienced firsthand the unmatched
versatility of a device that integrates a dual-
core ARMCortex-A9 MPCore processor with
programmable logic and key peripherals all on
the same chip, a growing number of custom-
ers are expanding their use of the Zynq SoC
from the processor of choice for one socket to
the platform choice for entire product lines.
By deploying a platform strategy leveraging
the Zynq SoC and hardware/software reuse,
they are able to quickly create many deriva-
tives or variations of their products. The result
is higher levels of design productivity and an
improvement in the bottom line.
Let’s look at what practices top platform-elec-
tronics companies employ to improve profit-
ability; why the Zynq SoC is far superior to
ASIC, standalone ASSP and even two-chip
ASSP+FPGA platform implementations; and
how you can put this SoC to good use to
drive prolific profitability at your company.
To many, the word platform has become an
overused marketing term. But in the elec-
tronics industry, many companies such as
Apple, Intel and Cisco Systems have effec-
tively executed platform business strategies to
become highly profitable electronics leaders.
In deploying platform strategies, companies
make a relatively substantial upfront invest-
ment in creating and documenting the blocks
they designed for the initial version of their
electronics product platform. They then turn
those design blocks into intellectual-property
(IP) blocks, which they reuse to quickly and
easily expand into derivative product lines
and models along with next-generation prod-
ucts, delivering each of those derivative prod-
ucts faster and with less effort, less design cost
and fewer resources.
Research firm International Business Strate-
gies (IBS) in its 2013 report “Factors for Suc-
cess in System IC Business” concludes that as
the cost of producing an ASIC or ASSP device
using the latest silicon processes continues to
rise from the 28-nanometer manufacturing
node to 20nm, 16nm and 10nm, companies
producing their own chips will increasingly
struggle to achieve the traditional end-prod-
uct revenue goal: revenue 10 times larger than
their initial R&D investment. Many make great
strides toward achieving this 10x goal by creat-
ing multiple derivative products on each node.
“Derivative designs can cost 20 percent of the
initial design cost, which means that if a com-
mitment is made to a new product family that
has very high development costs, then deriv-
ative designs can be implemented at a much
lower cost. To optimize revenues and profits,
it is advantageous for companies to imple-
ment multiple (derivative) designs in a tech-
nology node,” the report said. “Implementing
only one or two designs in a technology node
can result in very high up-front costs and high
risks associated with getting good financial
returns. “New design concepts that reduce
the cost of implementing new products have
the potential to change the structure of the
semiconductor industry dramatically,” the
report went on. “However, until a new design
methodology emerges, semiconductor com-
panies need to adapt their business models to
the reality of the changing financial metrics in
the semiconductor industry as feature dimen-
sions are reduced” [source: International
Business Strategies, Inc. (IBS) (2013/2014)]
In the study, IBS shows that the design cost
of a 28-nm ASIC or ASSP (the first or initial
product) is $130 million (figure 1). Mean-
while, the design cost of a derivative is signifi-
cantly lower: $35.6 million. Thus, to achieve
the 10x revenue goal for both types of devices
