ECE + BAS February 2014 - page 21

M
ICROCONTROLLERS
As system performance demands have increased
relentlessly, this trend has become progressively
more advanced and entrenched. However, per-
formance demands in some applications are
now pushing beyond the limitations of board-
speed interconnections between separate
processors and FPGAs. In addition, new de-
mands are emerging for small and lightweight
equipment such as mechatronic assemblies or
video cameras for use in covert surveillance,
gantry-mounted machine vision, and automo-
tive applications. As a result, system designers
are under continued pressure to achieve greater
hardware integration and miniaturisation. An-
other important factor is the constant need to
adapt to keep pace with changing standards,
and to support continuous evolution of suc-
cessful products as designers seek to add new,
faster, and better functionality.
Some standard ICs are available, particularly
in the digital-imaging field, which integrate
ARM-based control processing with a DSP or
Graphics Processing Unit (GPU). Some draw-
backs of these devices can include an excessively
rigid processing architecture and limited or
inflexible I/O resources. Processing perform-
ance can be insufficient as end-user markets
continue to push for systems offering more
sophisticated features and faster response.
These limitations may also restrict future prod-
uct development, by preventing implementa-
tion of new features or performance upgrades
without significant hardware redesign such as
adding an extra standalone FPGA.
Xilinx is addressing the performance and inte-
gration demands facing future generations of
smarter connected systems with the Zynq-
7000 All Programmable System on Chip (SoC).
This is the first device to integrate an ARM
dual-core Cortex-A9 MPCore processor as
well as programmable logic and key peripherals
on a single chip. There is also a comprehensive
supporting infrastructure of tools and IP that
enables system developers to create differenti-
ating features and quickly deliver new innova-
tions to market. This infrastructure includes
the Vivado HLS (High-Level Synthesis) Design
Suite, IP Integrator tools, OpenCV (computer
vision) libraries, SmartCORE IP, and spe-
cialised development kits. With the combina-
tion of an ARM application processor, pro-
grammable logic including configurable DSP
resources, and peripherals including flexible
I/Os capable of supporting a wide variety of
industry-standard protocols up to multi-giga-
bit data rates, the Zynq-7000 All Programmable
architecture eliminates the performance bot-
tlenecks encountered between conventional
discrete processors, FPGAs, and I/O trans-
ceivers. Over 3000 on-chip connections be-
tween the processor and logic enable develop-
ers to overcome the limitations of conventional
board-speed interconnects by exchanging data
at silicon speed.
The Zynq SoC provides an ideal architecture
for hosting smart connected applications, par-
ticularly where high-performance real-time
video processing is required. SoC is able to im-
plement signal processing to capture image
data from a camera sensor, and can support a
wide range of I/O-signals to accommodate di-
verse camera connectivity requirements. Sub-
sequent pixel-level processing or video pro-
cessing, followed by compute-intensive ana-
lytics leveraging the parallel-computing capa-
bilities of FPGA logic are also performed on-
chip. The Zynq device is also able to perform
post processing of the analytic data, execute
any graphics processing, and finally encode
the resulting signals for transmission.
The Zynq SoC ARM application processor
and FPGA logic work together. Complex algo-
rithms can be implemented in FPGA logic for
example, to accelerate execution and offload
the application processor and thereby help
meet system performance requirements. To
connect the system to a centralised controller
or display, the programmable I/O in the Zynq
SoC allows developers to target a vast number
of market-specific or industry-standard
The All Programmable SoC provides a flexible architecture and enables complex
functions to be performed in hardware.
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