M
ICROCONTROLLERS
15
February 2014
Besides the traditional serial wire debug functions,
ARM Cortex-M based microcontrollers also
offer an instrumentation trace interface through
their single-pin Serial Wire Viewer Output
(SWO)3, as shown in figure 2. This port can be
used to pass printf-format debug messages di-
rectly to application code. SWO allows the debug
messages to be viewed directly from any standard
IDE. Additionally, these messages can be viewed
through a standalone SWO viewer such as Segger
J-Link SWOViewer software4or the energyAware
Commander from Silicon Labs4. Since the SWO
output is built into the core HW itself, this is an
inherent benefit of the Cortex-M core. SWO
doesn’t waste any of the regular UARTs of the
MCU, which might already be committed to
the application.
Another important advantage of SWO-based
debugging is that it allows the MCU to main-
tain an active debug connection when it enters
its lowest sleep modes where, in most cases,
the logic for traditional debug connections is
inoperative. The instrumentation trace of the
SWO can also be used for sampling the pro-
gram counter to help IDEs create statistics on
how much time is spent in each of the program
functions. These statistics can be combined
with current measurements to help fine-tune
the energy consumption of a design.
Cortex-M based MCU vendors are beginning
to recognize this benefit, and some manufac-
turers have already incorporated power profile
and current measurement hardware into their
development platforms for this purpose. For
example, all starter and development kits for
the EFM32 Gecko MCUs from Silicon Labs
include live power measurement outputs, which
can be coupled with the program trace in the
energyAware Profiler tool6. Figure 3 shows
how this allows the designer to pinpoint which
program functions are the highest energy
drains and allows fast debugging of other en-
ergy-related problems.
The ARM Cortex-M processor Sleep-on-Exit
instruction is another twofer feature that can
save both CPU cycles and energy. This is espe-
cially useful in interrupt-driven applications
where the processor spends most of its time
either running interrupt handlers or sleeping
between interrupt events. When entering an
interrupt service routine (ISR), the MCU must
spend several instruction cycles pushing the
present thread state onto the stack and then
popping it upon return. In applications where
the processor returns directly to its sleep after
an ISR, a conventional MCU must still recover
its stored state information before the thread
code can put the device to sleep. Likewise, its
Figure 1. Comparison of the Cortex-M3 and M4 processor cores
Figure 2. The dedicated ARM Cortex SWO interface saves I/O Pins and speeds up debugging.
