September 2016
28
P
ower
E
lectronics
is a much higher magnitude (and therefore the
RMS current and corresponding conduction
loss is increased), but allowing the inductor to
fully discharge sets up the condition for lossless
commutation of the diode – essentially free ZVS.
The example in figure 2 shows the process.
When the inductor current reaches zero, the
equivalent circuit is an LC, where the capaci-
tance is not the big bulk capacitor on the DC
bus (it is blocked by the diode), but the com-
bined output capacitance of the switch plus the
parasitic capacitance of the diode and induc-
tor. The initial condition of the circuit is that C
is charged to the bus voltage, and at t0, it will
resonate and ring down to negative bus volt-
age, only the switch will clamp it as it crosses
zero volts. This mode of operating the PFC
circuit is known as critical conduction mode
CrCM. The concept of using small amounts
of energy stored in the inductor or in device
capacitance is widely used to enable ZVS in
a variety of topologies and control strategies.
The LLC converter (figure 4) is a good exam-
ple of a DC-DC stage that uses resonance to
achieve ZVS in the back half of a power sup-
ply. As already mentioned, ZVS can work with
any type of switch, but here is where the big
difference between conventional silicon FETs
and GaN HEMTs becomes important. The
far lower capacitance and charge of the GaN
HEMT requires less energy and shorter dead-
time to achieve ZVS, compared to silicon
FETs. The shorter deadtime is the main reason
that LLC can now be operated at much higher
frequencies without incurring additional loss.
Normally in the LLC circuit, the ZVS transi-
tion only takes a small percentage of the total
resonant period – for example it may be 330ns
out of a typical operating frequency of 150
kHz, approximately 5% of the period. But if
the frequency were increased 4X to 600 kHz,
now the 5% (per edge) becomes 20%! The
transition time (also known as deadtime) is
non-productive power transferring time – it is
simply waiting for the lossless ZVS transition.
This means that, as the deadtime becomes a
larger percentage of the total period, the pro-
ductive portion of the resonant period is pro-
portionally smaller, and this drives the RMS
current much higher due to the higher peak
to average ratio.
In other words, in order to increase frequency
significantly in a ZVS circuit, the circulat-
ing energy required to achieve ZVS has to
decrease proportionally, otherwise the pen-
alty of increased RMS current on both the
primary and secondary sides will kill the effi-
ciency of the power supply, making it impos-
sible to improve density. But the relationship
between capacitance, charge and energy in
modern high voltage (superjunction) MOS-
FETs is complex because the capacitance is so
Figure 4. LLC converter topology
Figure 5a. LLC ZVS waveforms for superjun-
ction FET. Vgs is 5 V/div, Vds is 100 V/div,
time scale is 100 ns/div.
Figure 5b. LLC ZVS waveforms for GaN
HEMT. Vgs is 5 V/div, Vds is 100 V/div, time
scale is 100 ns/div.
Figure 6. Power density of a conventional 130 kHz silicon-based power supply (left) compared
with a 350 kHz GaN-based design (right).
For 55 mΩ nominal Rds(on)
Best Superjunction E mode GaN HEMT
Qg (typ)
68 nC
6 nC
Qoss (typ)
420 nC
44 nC
Eoss (typ)
8 μJ
7 μJ
Qrr (typ)
6,000 nC
0 nC
Table 1. Typical parameters of 600 V superjunction FET compared with 600 V GaN HEMT.
