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October 2014
M
ICROCONTROLLERS
mode, the CPU performs certain functions
along with select peripherals. Flash and data
EEPROM are stopped, for example, while
the system executes code from RAM at low
speed. The system can move in and out of Low
Power Run mode via software. It can also exit
via reset but not through interrupts. In many
embedded systems, MCUs spend a great
amount of time waiting for an event to hap-
pen, which can squander power. The STM-
8L152C6T6 offers a Low Power Wait mode, in
which the CPU clock is stopped. A reset or an
internal or external event, for example, gener-
ated by timers or I/O boards, will put the sys-
tem back into Low Power Run mode.
Active Halt mode goes one step further, stop-
ping the clocks for the CPU and all periph-
erals except for the RTC. External interrupts,
RTC interrupts, or reset can be used to wake
the system up from Active Halt mode. Finally,
Halt mode stops clocks for all peripherals
and the CPU. The device remains powered
up, maintaining data in RAM. An external
interrupt or reset will wake the device. Select
peripherals can also wake from Halt mode.
The device can be configured to wait without
the internal reference, allowing additional
power savings by cutting off the internal ref-
erence voltage. The Texas Instruments 16-bit
MSP430FR5739 MCU offers seven low-power
modes aimed at embedded systems in porta-
ble applications. At the top level, low-power
mode 0 (LPM0) disables the CPU and the
master clock while retaining all data. The
peripheral clocks remain active and the user
can choose the status of the submaster clock.
At the high end of power savings, low-power
mode 4.5 (LPM4.5) retains I/O pad state but
does not retain data and disables the internal
regulator. As part of its power-saving design,
the MCU also integrates ferroelectric RAM
for a lower-power non-volatile memory.
It doesn’t matter how many power-saving
modes an MCU has if they’re not properly
used. That’s where power debugging tools like
the I-Jet from IAR Software Systems come into
play. The I-Jet samples the power consumption
of the system as it runs and IAR Embedded
Workbench software package correlates that
power data with the operation of the system.
In a perfect world, a developer could correlate
a power spike directly to a line of code. The
reality is that system capacitances spread con-
sumption temporally, making it impossible to
operate so discretely. The best choice is to view
power usage correlated to function calls. The
user can then click on a power spike and trace
it back to code. With this degree of visibility,
the developer can identify peripherals that are
consuming power unnecessarily and perhaps
adjust clock rate or put the system into a pow-
er-saving mode while it sits idle, and wake it
up when it gets a response. This lets develop-
ers take advantage of their hardware’s power
management options for best performance.
The timeline window shows power consumption as sampled by the I-Jet correlated to function
calls, etc.
e2v releases new CERQUAD
package for 68020
e2v has announced the availability of a new
package option for its 68020 microproces-
sor. This new option will facilitate the tran-
sition from the original Plastic Quad Flat
Package, discontinued in 2010, and enable
manufacturers to secure long term pro-
duction of electronic systems using 68020
microprocessors.
Lapis: low power MCU with
Class D speaker amplifier and
audio playback function
LAPIS Semiconductor has announced the
development of a low power microcontroller
that integrates an 8bit low power MCU core,
speech synthesis circuit, high efficiency Class D
speaker amp, non-volatile memory, and oscilla-
tor circuit on a single chip, making audio play-
back possible by simply connecting to a speaker.
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