October 2014
42
M
ICROCONTROLLERS
Optimizing system efficiency using
MCU power management options
By Rich Miron,
Digi-Key
Embedded systems today
face demanding single-charge
operating requirements. MCUs
with a variety of built-in power
management options, coupled with
power debugging tools, can simplify
optimization and free designers
and OEMs to focus on their product
core value proposition.
The length of operation on a single charge
is very nearly as important as functionality
in portable electronics. It doesn’t matter how
much performance a device offers if the bat-
tery is dead. Todays crop of highly functional
MCUs, with platforms specifically designed
for low-power operation, offers an excellent
solution. Additional power-saving modes like
sleep mode, idle mode, doze mode, etc, and
functionality such as dedicated pins that auto-
matically transition the system to back-up bat-
tery when voltage is removed are also available.
Finally, throw the art of software development
into the mix using tools like the IAR Embed-
ded Workbench that show power consump-
tion for the execution of each line of code. By
reviewing the operation of the system in real
time, developers can make informed trade-
offs, for example, modifying clock speed, put-
ting the system into a lower power mode, etc,
to maximize operational efficiency.
If there’s any lingering doubt about the impor-
tance of power efficiency in embedded sys-
tems today, look no further than the recent
DRAM standards released by JEDEC. Not
only did the organization release a new ver-
sion of its portable-electronics standard in
LPDDR3, its latest general DRAM standard,
designated DDR4, includes a variety of fea-
tures such as a pseudo-open-train architec-
ture designed to reduce power consumption.
Whether a microcontroller is embedded
in a smartphone or an automobile, clearly
to meet customer requirements it needs to
deliver power-efficient operation. To optimize
power consumption, designers need to focus
on two key objectives: minimize the amount
of time spent in active mode, and minimize
the amount of current required in non-active
mode. Not too long ago, controllers offered a
single standby mode. Today, devices offer a
range of options to increase the opportunity
for systems to avoid active mode except when
absolutely necessary.
Microchip PIC24FJ128GA310 family of
microcontrollers provides a range of power
management options: VBAT allows the device
to transition to a back-up battery for the low-
est power consumption with RTCC. Deep
sleep allows near total power-down, with the
ability to wake-up on external triggers. Sleep
and Idle modes selectively shut down periph-
erals and/or core for substantial power reduc-
tion and fast wake-up. Doze mode allows CPU
to run at a lower clock speed than peripher-
als. Alternate clock modes allow on-the-fly
switching to a lower clock speed for selective
power reduction. And last but not at least,
the MCUs offer extreme low-power current
consumption for Deep Sleep: WDT: 270nA
at 3.3Vtyp; RTCC: 400nA at 32kHz, 3.3V typ,
and deep sleep current, 40nA, 3.3Vtyp.
Sleep and Idle modes allow designers to shut
down peripherals and/or the core to reduce
power consumption while maintaining the
ability for fast wake-up. In Retention Sleep
mode, key circuits receive power from a
separate low-voltage regulator. VBAT mode
switches the system to operate off a back-up
battery in the event that VDD is removed,
minimizing power consumption with RTCC.
Deep Sleep without RTCC provides almost
complete power down while maintaining
software control so the device can be brought
back up via external triggers. According to
the company, it can operate on just 40 nA
(3.3V typical) compared to 400 nA at 32 kHz
for RTCC mode. Modifying clock speed can
deliver important power savings. Doze mode,
for example, allows the user to save power by
manipulating clock speed, running the CPU
at a lower clock speed than peripherals. The
MCU also offers the option to switch on the
fly to lower clock speeds to fine-tune power
reduction.
The STM8L152C6T6 MCU from STMicro-
electronics provides five low-power modes to
allow users to balance among efficiency, per-
formance, and start-up time. In Wait mode,
the CPU clock stops running but peripherals
continue. The chip can be removed fromWait
mode via an internal or external interrupt, a
triggering event, or a reset. In Low Power Run
