January/February 2016 - page 17

February 2016
& C
USB 3.1 SuperSpeed flash drives
for industrial/embedded applications
By Damien Col,
This article introduces
the new U9 USB 3.1 NAND Flash
Controller combining USB SuperSpeed
with power-fail robustness and
reliability for industrial applications.
It takes full advantage of the
increased host interface performance,
without any trade-off on the
durability and reliability of
the solution.
In terms of removable flash storage, USB
is one of the most popular protocols and
USB drives are widely used in consumer
markets. Recently, USB is also gaining pop-
ularity in industrial applications. Based on
a certified interface it shows little field com-
patibility issues and establishes a fairly robust
connection compared to some other inter-
faces. Where Compact Flash (CF) has been
the leading and very reliable interface in the
past years, USB is gaining ground, not only
as a removable form factor, but especially as
embedded USB module or directly soldered
on a PCB as disk-on-board solution.
Besides reliability and data retention, read/
write speeds are becoming more important.
USB 2.0 solutions might not offer sufficient
performances. Also notably, access pattern
have great impact on flash system lifetime
and consumer graded products may fail in the
field. In-car infotainment, gaming or network
communications, for example, are fields of
application, which require fairly high transfer
rates and very low read latency.
To address the requirements of these markets,
Hyperstone is presenting its updated product
line of NAND flash controllers. With USB 2.0,
the system bottleneck was the USB interface
for a flash system rather than the NAND flash
interface. U9 is the latest Hyperstone USB con-
troller adopting USB 3.1 Gen 1 (SuperSpeed 5
Gbps). With 2 NAND flash channels and up
to 8 chip enables, it reaches sequential write
performance of up to 150 MBps, and sequen-
tial read performance of up to 200 MBps. It
benefits from the hyReliability flash manage-
ment features already implemented on previ-
ous Hyperstone designs as well as from the
latest hyMap technology for higher random
write performances and increased endurance.
Hyperstone is also in the process of providing
an Application Programmers Interface (API)
and library enabling its customers to develop
their own value-added differentiators and
proprietary firmware extensions.
U9 architecture follows a long line of flash
memory controller designs developed by
Hyperstone targeting industrial and embed-
ded markets. Around an AHB bus and its
own 32-bit RISC processor, it includes: USB
2.1 and 3.1 Gen 1 device interface and dedi-
cated PHYs including 2 channels NAND flash
interface comprised of: Direct Flash Access
(DFA) control co-processor, Flexible Error
Correction Coding (ECC up to 96-bits/1KB),
AES on-the-fly encryption/decryption engine,
and dedicated page buffers for each channels.
A number of additional interfaces using a
bank of GPIOs (I2C, SPI, GPIO) is also inte-
grated. USB 3.1 Gen1 can be confusing, but
this is the official name. However, it was more
commonly known as USB 3.0 (5 Gbps inter-
face). Due to various NAND flash technolo-
gies (SLC, MLC, TLC, 3D NAND…) different
requirements in terms of flash handling are
necessary. While process geometries are get-
ting smaller to reduce flash cost, data reten-
tion of data stored and endurance in terms
of write/erase cycles are getting worse. Over
the last years, customers enjoyed continuous
cost reductions regarding USD/GByte but as
flash memory vendors approach process lim-
itations, reliability is pushed to the limits. In
demanding markets, reliability, and power-fail
safety are issues to be taken care of since there
is a higher cost of non-conformance.
Power fail safety is a key issue for systems
requiring reliable data storage but facing unpre-
dictable power downs or being hot-plugged. If
the storage media is used to store code, cost
of being offline or requiring unscheduled ser-
vice should be considered. Unlike most SSD
controllers, offering comparable performance
and endurance, Hyperstone controllers do not
require external memory components to store
mapping data and FTL metadata. Protecting
external DRAM against power-fail requires
additional power back-ups such as battery or
supercaps in order to save management data
when a sudden power-fail occurs. Aside of cost,
such components also add to quality, wear-out
and endurance weaknesses.
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